We have designed  a gate driver board  using Dual Channel Cost Efficient Driver Core  for HV-IGBT (2SC0635T ) from Concept /Power Integrations.

Device Used : QID4515002 ,Dual IGBT HVIGBT Module 150 Amperes/4500 Volts

We are powering a single phase full bridge inverter with two gate drivers.

One half bridge(Top and Bottom Device)  is powered from one Dual Channel  driver core.

“When we are experiencing Vce saturation fault from a particular device  , the driver core will make the corresponding pwm pulse for that device  ḶOW but the pulse in the other device in the half bridge is pulled HIGH. “

This condition is not desirable for our design,we need both the pulses low whenever the fault occurs.

Please clarify whether it is possible ?  

 Please suggest remedial conditions to contain the situation?

Our working DC window is  = 2000V (max)