AC to DC converter with battery charger

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Hi,
I am designing a AC to DC converter with a battery charger. Input : Universal; Output is 48V @ 300W. This should be able to charge a battery and supply to load of 225W. Can you please suggest some designs?
Thanks
Granthana

A good start is design example DER-484. The report is available for download here at the PI web site. The design features a PFC front end utilizing the PFS series of integrated controllers/power switches and a 2-switch forward DC-DC converter featuring the TFS-2 integrated controller/switch. Another possibility for the DC-DC output stage is an LLC converter using the LCS series of integrated controller/switch. An LED streetlight driver (similar in principle to battery charger) is shown in design example DER-648, using the PFS and LCS series of devices..

Thank you for the response. I see that there no solutions for 85 to 300V input. The low range of input voltage (85V) seems to be the problem resulting in a high bulk side capacitance. Can anyone explain the reason for this?

First things first - you will not be able to achieve 85-300 VAC input, 300 W operation with any of our products without using a PFC front end. The peak switch currents will be too high at low line voltage.

With the PFC front end, it is possible to run at 300 VAC input by shifting the boost voltage at the PFC output from the usual 380 VDC to ~430-450 VDC, requiring 500V rated bulk capacitors instead of the usual 450V capacitors. This is shown in the LED driver design example referenced, previously, which was designed to be capable of running from 277 V..

For a full range converter without PFC, a high value bulk capacitor is needed because of the low amount of energy storage at low line. Energy storage in a capacitor scales as V^2, so the energy storage drops off a cliff at low line voltage, causing excessive voltage sag between AC 1/2 cycles.

Can we have a call? I have lots of questions on the design.

What I suggest that you first do is some initial work with our design software.

First off, you can decide whether to use TFS-2 or LCS (2-switch forward or LLC). for your output DC-DC converter. Both options will work at this power level with a PFC front end.

If efficiency is your main concern, use an LLC design with the LCS part. You can expect 94-95% DC-DC efficiency using LCS with Schottky output rectification at 48V output.

Use the power output and efficiency of your DC-DC converter as an input for the PFC design. using PFS-4.

These steps will give you a rough cut for the "engine" for your charger design. The actual CV/CC circuitry can be added after this step.

1. I tried the PI Expert Online tool. I get a design optimization error that the Peak primary current exceeds device current limit -- Select larger PI device, increase minimum input voltage (VACMIN or VDCMIN), increase reflected output voltage (VOR), decrease KP, increase input capacitor (CIN) if applicable.
2. My question is: How do I estimate the input capacitor value (any equations?) if I don't want to increase the Vmin. From the tool the Cin is 560uF.

It sounds like you are trying to do a single stage universal input flyback design using a TOPSwitch or Linkswitch-HP.. Neither of these parts can deliver 300 W for a universal input flyback design. - please check the data sheets.

If you want to do a 300W, universal input design using PI parts, you will need to use a 2-stage design with an input PFC boost stage to reduce the peak operating current in the DC-DC stage. Again, I suggest using a PFS-based boost front end feeding a DC-DC converter., either a 2-switch forward using our TFS-2 parts, or an LLC DC-DC converter using our LCS parts. Both designs are described in the reports I referenced at the beginning of this thread.

It is also possible to use a PFS boost stage to feed a TOPSwitch-based flyback DC-DC, but output power will be limited to ~250-270W. This design will probably also be less efficient than a TFS or LCS-based DC-DC converter and be more problematic in terms of primary and secondary peak currents.

If you insist on trying to do a single stage 300W universal input flyback design, we have no parts that will work for you..

I want to do a two stage design. But the tool does not allow me to choose a two stage version or I don’t know how to do it. Even if I choose the LCS part the tool goes back to providing suggestion for a fly back with top switch part. Please let me know how to solve this.

I was able to get the tool to work for the first stage PFC boost design. I will check this out more. Thank you for your help.

PIExpert online limits you to PIXLS for designs using the LCS. Here is a first-cut LCS design using an EER35 core running at 100kHz, with 450V B+ voltage. The design has already been tweaked for actual leakage inductance.

Hi.. Can you explain how we are circumventing the energy storage at low line when we use the PFC boost stage circuit? I can use the PFC boos stage but would like to understand the problem with just using a single stage circuit.

The PFC boosts the input AC voltage to a high and regulated B+ voltage, making life much easier for the following DC-DC stage. The voltage to run the PFC stage is actually drawn form a relatively small film capacitor (~0.5-1uF) right after the input rectifier bridge, specified to handle the RMS current drawn by the PFC switching mosfet. The capacitor is deliberately sized to not keep a constant DC voltage, so as not to adversely affect the input power factor. The voltage on this capacitor looks like a rectified sine, with deep notches in the capacitor voltage around the AC zero crossing. The switch in the PFC is sized to handle the peak current necessary for a given output power..

The power factor correction drastically lowers the peak current drawn from the AC line, making life easier for the fuse and EMI filter components. The high B+ voltage allows use of a smaller value bulk capacitor because of the energy storage advantage at high voltage.

A single stage 300W flyback would be an extremely difficult design, with high peak and RMS current drawn from the AC line at low voltage. The switch peak currents would also be extremely high, putting a lot of stress not only on the primary switch , but on the transformer, output rectifier and filter capacitors. The high stress levels lower the attainable efficiency, and would make fan cooling an absolute must. The requirement for energy storage at low input voltage requires use of a large bulk filter cap (2-3 uF/watt).
This changes if you use a boost PFC front end, since the flyback is then running at a high and constant input voltage. The PFC and input rectifier bridge will still need a largish heat sink.. The flyback option with PFC front end has a lower efficiency than the 2-switch forward and LLC solutions because of the relatively high peak current, even with a PFC boost front end.

The 2-switch forward is ill-suited for a universal input design because of the wide duty cycle range required to run with universal input. An LLC converter is also ill-suited for universal input operation, as its operating frequency needs to run over a wide range just to handle the voltage change from low line to high line. A battery charger requirement makes this doubly difficult, as the frequency must also change to regulate the output current over a wide range of output voltage. Both the 2-switch forward and LLC converters run optimally with a high, constant DC input voltage. Both will be more efficient than a flyback solution., either universal input or with PFC front end.

Thanks. I am using the following formula to compute the bulk capacitor for the two stage.
Cb = 2*(Output Power/Efficiency)*holduptime / [Vdc^2 - Vmin^2]. I am getting around 732uF. But the tool shows 220uF. How to compare this?
Do you provide any Simplis model or spice model for the controller?

Remember that the bulk capacitor is at the output of the PFC, so you will be getting a regulated B+ voltage of 420-430V. This greatly reduces the amount of capacitor needed for a given output power. For your application, holdup time should not be a consideration, though a 150uF cap gets you just under 20 mS. Bigger considerations are the maximum allowable output ripple (generally ~20V) and capacitor ripple current rating. This is no joke as you will be needing a 500V rated bulk cap, and the higher the voltage rating, the higher the ESR, with lower ripple current rating. You should be using the PFS4 for your input PFC chip, as itts internal mosfet has the voltage rating you will need.

What will be the cost of this solution? Can we discuss the pricing?

You will be the best judge of that, A starting template for estimating costs could be the schematic and BOM of the DER-648, which has roughly the functionality you need. Contact the local PI office for quotes on the PI devices at your proposed manufacturing quantity.