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Eight questions on HiperPFS-4

Posted by: treez on

Hi,
Please advise on answers to the following eight question on HiperPFS-4 PFC controller?

1…. Question: Setting of Brown in/out threshold depends on set value of vout for Boost PFC?
Hi,
From page 14 of the HiperPFS datasheet it appears (?) that if vout is not set to 385VDC, then the divider to the voltage monitor pin needs adjusting and then this is said to mean a different Brown in and Brown out threshold.
Is this correct? How has the setting of the brown in/brown out threshold got mixed up with the setting of the output voltage?
HiperPFS datasheet:
https://ac-dc.power.com/sites/default/files/product-docs/hiperpfs-3_family_datasheet.pdf
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2…..Question: Max possible Vout of Boost PFC?
Hi
Page 13 of HiperPFS 3 datasheet states that vout of the Boost PFC should never be set to >395V. It is said that there would be a danger of overvoltaging the internal FET during mains transients or load transients
..However, the abs max drain source voltage of the internal FET is 530V. There is a huge output capacitor of at least 100uF on the output of the Boost PFC. So there is no chance of the internal FET getting overvoltaged, even during line and load transients.
So why can we not make the vout say 400V?
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3….. Question: Snubber capacitor to safeguard HiperPFS B(Vdss) of 530V?
Hi,
Page 18 of the HiperPFS Boost PFC controller datasheet says that a 33-100pF capacitor should be connected across the Boost PFC diode in order to prevent the internal FET’s B(Vdss) of 530V from being breached.
Page 18 says that the 530V level is most likely to be breached during heavy loading of the Boost output to almost the overload level.
How can such a capacitor be of any use? Surely it would just create more circuit noise due to high di/dt as such a snubber capacitor gets rapidly charged/discharged?
How could the drain of the internal FET go up to 530V?....As soon as the drain voltage goes above Vout then the Boost diode will clamp the drain voltage to vout…..which wouldn’t get anywhere near 530V.
The only way the drain could get up to 530V would be due to PCB trace stray inductance…but this should be minimised with tight layout and having a small value ceramic cap right at the internal boost diode cathode going down to the controller’s star ground point with the power ground.

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4…… Question: PFC controller uses voltage divider resistors of too high value?…moisture problem?
Hi,
Page 12 of the HiperPFS Boost PFC controller datasheet shows dividers being used for Vout regulation, and also for VAC input detection for Brown in/out monitoring and Input OV detection. The upper resistance of these dividers is greater than 15 MegOhms. This surely is way too high? Slight moisture on these resistors will surely result in false tripping of Input overvoltage detection and poor vout regulation?
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5 TITLE: Why isnt everybody using HiperPFS-3?
HiperPFS-3 gives you boost fet and diode and controller on a single chip, no sense resistor needed, Error amplifier changes dynamics as vout goes outside nominal in order to preserve the output voltage and improve vout regulation…..why is the HiperPFS not the defacto “go-to” chip for Boost PFC today?
HiperPFS datasheet:
https://ac-dc.power.com/sites/default/files/product-docs/hiperpfs-3_family_datasheet.pdf
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6…. Question: Can HiperPFS-3 handle a non sinusoidal UPS waveform as attached?
Page 1 of the HiperPFS-3 datasheet states that it has facility to handle distorted input waveforms from UPS. As such, can the HiperPFS handle the attached square wave type output of an UPS?
Would you agree that the lack of Post rectifier bus voltage sensing makes it easier for the HiperPFS -3 to handle “square wave mains”?
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7.... Question:.....How do you find the inductor value in a HiperPFS-3 Boost PFC design?
Hi,
Suppose you are doing a Boost PFC for 205-250VAC input, 400V output and 250W power.
Then the way to find the inductor value is to get the switching frequency. Then you design a Boost converter for the Static case of Vin = 205*sqrt(2), and Vout = 400V and Pout = 2*250W. Using the equation Vout/Vin = 1/(1-D) , amongst others, one then assess’s what inductor value gives you the tolerated level of inductor ripple current. Thus you get your inductor value.
….However, one cannot do this with the HiperPFS-3, because you have no way of knowing what the switching frequency will be.
There is a graph on page 7 of the HiperPFS-3 datasheet (Fig9a) which shows switching frequency at mains peak for various mains input voltages….but it does not give switching frequency for 205VAC. Also, Fig9a must only be relevant for a particular value of Vout, but fig9a does not say what this vout value is.
So how do you calculate the needed Boost PFC inductance value for HiperPFS-3?
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8.... Question:…How can you set the peak current limit on hiperPFS4?
The voltage monitor pin divider ratio affects the peak power limit. How does this happen? How can we set a peak current limit for the FET switch?
How can we bypass the Voltage monitor pin? We want to bypass it because we want to set our own brown out threshold.
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Comments

Submitted by PI-Wrench on 01/13/2021

In no particular order -

Question 2 - the assumption of highest value for PFS output voltage does not take into account the effects of line surge. Differential combination wave surge events can easily push the PFC output voltage to values far exceeding that for normal high line operation. This is especially true if the designer skimps on the bulk capacitor value to reduce costs, or tries to save money by reducing the size or eliminating the MOV at the supply input.
The PFS protects itself by stopping switching when the output voltage is pushed above the overvoltage limit. The output diode isolates the PFC output from the switching fet.

Question 3 - actually a PFS-3 question....
Given the possibility of line surge transients as mentioned previously, there is not a lot of voltage margin for the switch in PFS3. The capacitor mentioned is to shave off the edge of the forward recovery transient of the PFC output diode, which can be 10-20V even for a hyperfast diode.. This transient occurs because the diode doesn't turn on instantaneously, instead taking a finite time for charge carriers to saturate the the junction when the diode is forward biased. Unfortunately, forward recovery is not usually specified for fast diodes, and the value can vary depending on the vendor and the device process.

Question 6 - Yes, the PFS can handle a square wave input. This, and other nasty waveforms are applied to the PFS during qualification.

Question7 - To determine the inductor value for a PFS part, use the provided software design tools for the appropriate device.

Submitted by PI-Wrench on 01/22/2021

Question 1 - I recall that you were interested in a design using 400V output voltage. To attain that, change the Vout divider for the desired boost voltage. Keep the Vin divider for the desired Von threshold. Unfortunately, the ratio for Vbrownout vs. Von is fixed, so you don't get to independently select Vbrownout.. Because there is now a difference between the ratios on the Vin and Vout divider strings, there might be a small impact on PF. However, the higher boost voltage should give better PF for high input voltage and light load.

Question 4 - you can use lower value resistors in the Vout and Vin divider strings if you chose, with an impact on light/no-load input power. The high value restor strings are used when a customer needs absolutely the lowest possible no-load power consumption. Proper board cleaning and conformal coating can be used in situations where there is high humidity or a high pollution index. Conformal coating is commonly used is applications like washing machines to get around the high humidty.

Question 3 - some customers need higher power that can be obtained from a PFS sol;ution, so they opt for an alternate solution.

Question 6 - You do not get to independently select the device current limit - instead, select the appropriate device for your power requirement. If you use PI-Expert or PIXLS, the appropriate device can be selected by the design program for a given application. You can also manually select a specific device for an application, and the software will flag design issues resulting from that choice.

Submitted by treez on 01/24/2021

Thanks, the thing that puts us off being limited to 385VDC output, is that Littelfuse application engineers tell us that once every 20 years the UK mains goes up to 285VAC (403Vpk). (this year could be "that" 20th year)
That is going to play havoc with a PFC whose output is set to 385VDC. Do you have comments on this?
Also, speaking of PFC voltage during line surges, surely no line surge could push a say, 150uF PFC output capacitor bank up more than a few Volts?....surges are just 1.2us/50us things.....high energy density, but low overall energy?

Submitted by PI-Wrench on 01/25/2021

If you have a line swell as described, your PF might temporarily suffer, but the supply should ride through as long as the B+ voltage is less than the OV setting for the PFS.

B+ elevation during differential line surge is real, and no joke or idle speculation. It can be reduced by selecting an MOV with a lower ultimate clamp voltage, but it will still be present. I am including a picture of B+ elevation during a 2kV differential event for a supply with input MOV protection and 120 uF bulk capacitor, operating at 230 V.AC. Keep in mind, some customers might require withstanding 6.6kV differential surge without damage - the scope picture was taken with a mere 2kV diff surge.

The PFS-4 incorporates a mosfet with 600V rating, a better choice for your needs.

Submitted by treez on 01/25/2021

Thanks, thats an interesting scope shot. It looks like its on no_load because the vout doesnt return downwards after the transient event. Also, its strange that the vout doesnt hold at the peak, because its on no load. Do you know why these things are seen?

Submitted by PI-Wrench on 01/26/2021

The Vout doesn't decay quickly, because the supply has gone into input overvoltage shutdown to protect itself. The surge event probably has a peak like shown due to the interaction of the surge current with the ESR of the bulk cap (considerable). The peak is rounded as shown because the bulk capacitor is fed via the differential filter inductor in the front end of the supply.

Submitted by treez on 01/26/2021

Thankyou very much.
The scope shot is very interesting. It shows that the 120uF capacitor was lifted from 400V to 436V in 25us. To do this with a constant current would need a current of 172A over the 25us. You would have thought that this would saturate any differential mode inductances in the input filter?

Submitted by PI-Wrench on 01/26/2021

Probably does, though the diff inductor is wound on a powdered iron core , which has sloppy saturation characteristics. Keep in mind also that about half of the voltage lift (the part that goes away) is due to ESR of the bulk capacitor.

Submitted by treez on 04/10/2021

Thanks for the scope shot of #5 above. I presume this was taken using a standard surge test device, and was obviouly not a "real" mains surge. As you know, a real mains surge would be quenched by all the devices connected to the mains, and so its unlikely that the voltage rise would be as high as shown. But thankyou anyway, as it was very very interesting to see this.

I am actually doubtful that high energy surges on the mains (of the nature of the one in #5) are all that common. It would have to be caused by a very high (presumbaly fault) current in the mains getting suddenly broken by eg a huge fuse or circuit breaker operating......even then, most incidences just wouldnt be able to have this much energy.....and generally , most times, any energy will be quenched in the snubber across the circuit breaker itself.

Submitted by PI-Wrench on 04/14/2021

It only takes one abnormal surge to blow a device without proper protection from an MOV and appropriately sized bulk filter cap. This can easily happen in a country with notoriously unstable line voltage - a couple come to mind. Also, the surge test is conducted with only one DUT connected to the surge generator as a worst case scenario. The waveforms generated by the surge tester are based on actual events caused by load dumps, induced common mode surge from nearby lightning strikes, etc.