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How to supress noise in the output

Posted by: karimulla baig on

Dear Sir

 

We had design the power supply by using power integration IC  top switch series we had find some issue in the output we are getting lot of noise I have attached the images, kindly let me how we can sort out this issue.

I

Comments

Submitted by PI-NANO on 07/25/2013

Hi,

 

I am not sure about how the output voltage ripple has been measured. The waveforms that you have attached are barely visible.

 

But I think it's all probe noise pickup.

 

Could you please measure the output ripple by using the following method and limit the bandwidth of the probe to 20MHZ in order to avoid the high frequency noise pick up.

 

Ripple Measurement Technique

 

For DC output ripple measurements, a modified oscilloscope test probe must be utilized in order to reduce spurious signals due to pick up. Details of the probe modification are provided in the Figures attached.


The 4987BA probe adapter is affixed with two capacitors tied in parallel across the probe tip. The capacitors include one (1) 0.1 uF/50 V ceramic type and one (1) 1.0 uF/50 V aluminum electrolytic. The aluminum electrolytic type capacitor is polarized, so proper polarity across DC outputs must be maintained.

 

Regards,

PI-NANO

Submitted by karimulla baig on 08/20/2013

Hi,

 

I have an issue with multiple output power supply using TOP switch JX series. The circuit is working fine i have an issue in regulation of all the three secondary outputs because the regulation is maintained only at one output of the secondary the remaining two outputs, output2 and output3 will be based on output1 regulation so i want to regulate all the three outputs through a feedback circuit because i want to use this powersupply for ADC sensing side. kindly let me know how can i regulate all the three outputs with single secondary feedback.

 

Regards,

 

Karimulla Baig.

Submitted by PI-NANO on 08/23/2013

Hi,

 

Cross regulation effect is  very common in fly-back topologies. Cross regulation effect can be minimised up to some extent by doing the following things

 

1. AC stacked windings and center tapping on the secondary of the transformer

2. Using weighted feedback method

 

Please have a look at one of the design example for reference

 

http://www.powerint.com/sites/default/files/PDFFiles/der299.pdf

 

Regards,

PI-NANO