PFS and LCS Power Supply

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I  have a design based on rdr236.pdf and rdr239.pdf.

I have just powered it up and I get the proper output voltage 24V but the LLC waveform is the correct frequency but it has a low frequency oscillation on it.

Here is my schematic and some waveforms.

There is also a low frequency oscillation on the 400V from the PFS.

I checked my HiperLCS Design1.pixls and HiperPFS Boost Design1.pixls and tried R52 set for Burst mode 1,2,and 3 ,

it didn't change the waveform .

How do I submit the .pixls files to you? 

HiperPFS Boost Design1.pixls25.39 KB

What are the input and output specifications?
What are the input and load conditions when you took the oscilloscope waveform?
Pls. take the input AC current waveform and post it.

You can attach the PIXLS files here.

Input 115 VAC , 400 HZ output 24 V DC.

Inoput 115 VAC 400HZ, output noload, 4A, and 8A for each scan. .jpg File name is description. 

I will get  an input current waveform and post it  soon. 

There was noise from a trace that has been eliminated so the PFC now looks good.

I still have the problem withe the low frequency oscillation on the LLC current.

Pls. explain waht's in the waveforms you attached, including the test conditions.

Input 115 VAC , 400 HZ output 24 V DC.

Inoput 115 VAC 400HZ, output noload, 4A, and 8A for each scan. .jpg File name is description. 

Did you attach more pics?  I only see one attachment called "trace".

I'll Attach them again. 

I noticed in AN-55 the ESR of the output capacitor affecting a 10 to 50 KHZ possible oscillation in the output. Which it seems like I have. I tried various capacitor sizes  and I inserted resistance in series with the capacitor. There was some effect on thr oscillationbut it did not eliminate it.

More pictures 

HB vs Primary current at 8A 24 VDC load

Let's work on the LLC first.

Your abnormal waveforms may be due to layout and noise issues.

Can you post the schematic and PCB layout?


The PFC is working fine. I did have to cut loose and reroute with a wire a wide trace from the PFC drain the was directly underneath the high impedance feedback string.

The LLC oscillation is the remaining problem.  

I made the FB filter capacitor  .047 and it now work great.

The output ripple is 1 Vp-p at 100 khz and 8A output current 24 VDC output voltage.

I tried increasing the output capacitance and the ripple was unaffected.

I am using the Santronics LLC transformer SNX-2458 used on RDR-289.

When I scope the transformer outputs they don't look identical. I realize my probes are not identical.

Is that ripple expected at 100 KHZ, can I reduce it?

I will attach a scope trace.

Pls. double check the numbers "RDR-289" and "SNX-2458"

Oops, RDR-189  which used a TDK transformer.

The closest Santronics to the TDK is a SNX-2458.

We used that on a design based on RDR-189 and we are reusing SNX-2458 for an upgrade to the LCS part.

We would like to use a smaller higher frequency transformer.

But our volumes are low and Sanntronics did not have a high frequency low probfile transformer available.

The waveforms you show are indicative of a noise issue.

Make sure you follow the PCB layout guidelines, especially:
- the bypass capacitors of the FB and DT/BF pins are close to the device and connect to their pins and the GND pins through short traces

- components connected to the FB pin are sitting close to the FB pin 

- the trace going from the optocoupler to the FB pin circuitry does not pass near the HB pin trace going to the transformer, or to the components that connect to the VCCH pin



Attached is the layout in that area. I don't see any obvious conflict with your layout recommendations.

Do you see  something I am missing?

Any news?

I cannot tell much from the DOC file.  Can you post the PCB file?

Ok. It won't let me post the .pcb file but here is a .pdf of the layers.

Pls. try compressing it into a ZIP file and posting the PCB file again.  The DOC images are very hard to read.


What software package is this PCB file?

I have remeasured the ripple and it is closer to 200 mv p-p at 200 KHz when the DC output is 24 VDC 8 A.

Output P-P Ripple Voltage VRIPPLE 240 mV 20 MHz bandwidth MAX is shown in RDR-239.

Maybe my ripple is in the normal range? 

But measured shown on figure 47 is 36 mv p-p. The layout file is PADS PCB. Viewer is at 


The secondary traces (transformer, output diodes, output capacitor), are pretty narrow for 8A.

The current  loop area from the transformer secondary pins, to the diodes are larger than necessary.  Route a trace from the upper transformer secondary ground pin to the capacitors C39 and C42.  It is also probably better to use the 4 center-most pins of the transformer for the secondaries, instead of using outer pins.  This will reduce the loop area and thus parasitic inductance.


The output return trace that goes to the upper right hand corner of the PCB should route to C41 (-) pin, instead of to the transformer secondary pins.  This will reduce the height of the thin spikes in your output ripple waveform.

Fix these, and report back.  Show me your output ripple waveform.  Also show me your HB pin voltage, and transformer primary current.


Lastly move C37 a bit to the right.  It has high voltage and it's too close to the ground trace. 





 "Lastly move C37 a bit to the right.  It has high voltage and it's too close to the ground trace."

"I reworked it about a cm. away and didn’t observe any difference but I will ask layout to move it.'


The  issue being addressed here is not noise contamination, but insulation breakdown from high voltage.  It might arc from C37 to ground.

Ok. Anything on the other points?

Your latest waveforms clearly show feedback loop oscillation.


Place a series RC across R51 to reduce high frequency gain:
- 330 ohms, 330 nF



Added RC and added two 10 uFd caps in parallel with C42 and C39.

The low frequency oscillation is gone and output ripple is about 200 MV p-p.

Should I call it good? 

What does the ripple voltage waveform look like, right across C39/42?

You really should do a gain/phase measurement on the whole PSU, or at least do load step transient tests.

I stepped the load no load, 4A, 8A and current and voltage was stable.

The no load looked like burst mode with a several volt sawtooth , I changed the LM431 compensation to that of DER-282 and then no load was stable.

The ripple at the first set of capacitors (closest to the diodes) is about 1V which suggests they are a bit undersized.  Note in their datasheets that their capacitance shrinks with applied DC votlage. The general rule of thumb is that the p-p ripple voltage should be about 3% of the output DC voltage.  When they are undersized the efficiency of the converter drops slightly.

Attach scope trace