Hi,
Great observation but the diode rating is based from average current. The peak current rating will vary depending on the time and temperature.

If your application will be operated at high temperature then use a 2 ampere diode.

Regards,
PI

Dear sir, Thanks for the Clarification on diode MUR120. The application notes on Link-PH devices recommend to select 'Full' mode above 40W driver outputs. The default efficiency is around 81%. When we manually input a higher efficiency as required by clients, the PI expert optimizes with 'REDUCED' mode at efficiency of 90%.All other parameters Kp, IFB,VOR,Leakage ind etc are matching recommended values. Can we go ahead with the the Transformer design recommended? Please advise!

Hi,
The PI expert efficiency is estimate only. You need to key-in the actual efficiency once the unit was built. If this is the first iteration then better to assume the full mode operation so that you have some design margin for the TRF.

Once you have measured the actual efficiency then that is the time to recheck if the mode will change in order to further optimize the TRF.

You are almost there....

Regards,
PI

Dear sir, Thanks for your Clarification. You are right. This was the first iteration. When we select the Full mode the TRF size becomes larger. The PI expert selects the Reduced mode with a smaller TRF which looks optimum. The question is whether we go ahead and build the first Proto type based on the Reduced mode. My understanding is the full mode model with a bigger TRF would yield a better efficiency. In such a case why would one want to change the mode in the second iteration ? To what end! We shall be grateful for an in depth explanation to understand the actual difference between Reduced mode and Full mode and to select the right mode for optimal results.Regards

Hi,
Full mode will give you higher power delivery than reduce mode in a given device. Normally there is an overlap of power transfer between devices. Example is a 419 device at full mode can match the reduce mode of 420. The key advantage of having this flexibility is the optimization of efficiency with respect to input voltage operation. At high line application, a full mode is practical for reduce Coss and for low line application, a reduce mode is practical for lower Rds-on.

And as per your design, slight variation of efficiency will move you from one mode to another mode. It only means that your application is in the overlap area. As such if you can guarantee that you can manage the efficiency then select the reduce mode.

By the way, it is not always a scenario that increasing TRF size yields a better efficiency. It depends on the core loss and copper loss of winding. There would a point that increasing core size reduces the efficiency, for practical cost reasons we normally start with a small size core as recommended romr the PI expert.

I am delighted for your research, I think you can easily make it work.

Regards,
PI

Dear sir, Thanks a lot for that wonderful clarification. A lot ground could be could be covered. We made the 34V/1.4Amp Driver with LNK 419 in Full Mode and the 23V/2.2Amp with LNK 420 in Reduced Mode. The PI expert optimised both the transformers in PQ3230 core size with 65% Packing factor. We tried to get the windings into PQ2625 to minimise the cost with negative results from PI expert. We then mapped the requirements on PI Xls spread sheet and found it is possible to optimally design with PQ2625. We went ahead and made a sample for 34V/1.4Amp driver and got the targeted efficiency of 90% at 115V AC as well as 230V AC input. The output current regulation was also 1.4Amp+/- 2% over this range.The question is whether this approach is correct?-Developing the schematic with all inputs,outputs and options optimised on the PI expert and then Replacing the TRF with the one we optimise on the Spreadsheet. Please confirm this approach. We also found best results - Both regulation and rated output current -were achieved by tuning the IFB and the Bias voltage. The final IFB was 176ma (away from the design centric 150ma)and the Bias voltage around 21.5V. Please confirm whether it is ok to go along with these deviations?
We then added the THD reduction network 2200pf /1KV in series with 4.7Meg. from input Bus to the Feedback Pin.
Though the THD improved by 50% the output current regulation became poor,almost +/-10%.Please suggest possible remedial measures. Regards

Wow, nice result!
22nF is too high to improve the THD. This will inject significant current that will sacrifice the regulation of the unit. Please reduce this value to 10nF or below. Retune it such that it will not totally affect the output current regulation.
To further improve the THD, try to parallel a resistor in parallel to our peak detect circuit around 510k or lower.
See if you can further reduce the KP of TRF and lower the VOR to 80V to improve the THD.

Of course, you need to verify the calculation if it will not saturate.

Regards,
PI-Jono