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PIXls Designer 9.1 and Hiper_PFS-3 design problem

Posted by: Carpenter on

1.  If I make design in last version PIXls Designer 9.1.6.3 x64 on the Schematic I see on pin R (REF) HiperPFS-3 resistor Rref I thing this is Error becouse on REF pin is connected Capaciotor Cref

2. In inductor design seciton I have Ferrite, Core material PC44/PC95 Core PQ26/25. On line 63 in AL 6530 nH/t^2, this make LG for example LG 1,13mm and 63turn for 420uH . If I on line 63 change Core Al value in input this value on 4500 will not change LG or turn, LG is  still 1,13mm and turn 63

I thing her is any error

 

 

Files

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HiperPFS3 Boost Design1.pixls 39.5 KB

Comments

Submitted by PI-Neela on 07/28/2016

Thanks for flag the schematic error. Please follow the datasheet inforamtion, REF pin does have a capacitor instead of the resistor connected to it.

THe inductor calculation is based on the core cross section area, Ae (line 61). AL line 63 is a listed datasheet parameter. However it is not a iterated calculation with AL change. core selection change or Ae (line 61) change will make the inductor change.

OK
I've noticed a few trinkets.
PIXls Designer 9  HiperTFS2
LIne 74, KI it is Main Current Limit Selection 1, 0.9, 0,7 it affects line 75 R(FB) , unfortunately
KI=1.0 100% R= 232kOhm, OK
KI=0.9  90%  R=1740kOhm, datasheet say 511kOhm
KI=0.7  70%  R=1740kOhm, datasheet say Open
****************

Secondary Winding 2 (upper winding when AC stacked)
line163 WIRE
164 OD/Thinkness 0,7mm
165 Filar SEC2  2
on 168 is calculated DCD_SEC2 for example 75,8mOhm. Problem is if I change FILAR_SEC2 from 2 to 3 (3x 0,7mm wire paralel)
on 168 is calculated DCD_SEC2 113,7m Ohm. ????
I think 2x II R is > that 3x II R, where is the problem ???

 *********************************************************************

In datasheet hipertfs-2_family_datasheet.pdf
- page 40 eSIP-16F package description  Side View and BackView  reference 13x for pin bud this package have only 12 pin.
MOUNTING HOLE PATTERN (N.T.S) not inclute description for front or back view, is is problem in creating a footprint, especially when Figure 2.Package Option. on page 1 is picture with 13pin eSIP-16F and with description HiperTFS-2. :-)

DER-428 file  der428.pdf  page 9 schematics of PS , standby ouput is described as +5V thing this wrong, correct voltage is +12V, because diode D12  is from main PS +12V.

Submitted by PI-Neela on 08/16/2016

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<p>thank your for</p>
<p>ghefg</p>
highly appreciate your feedbacks. here are my answers:
1. TFS2 Line 74 resistor selection following KI need to be updated. PIXL has wring information. we will correct it.
2. question of "on 168 is calculated DCD_SEC2, " I agree with you in general. However, I need to see your PIXL design as problematic example before I make further comments.
3. PFS3 datasheet does not have 40 pages. However, refer to package fig 2, there are a few skipped pins from the package for enlarged creepage distance. It is 16 in total as the package is capable of handle. But no pin 2, 12, and 15.
4. mounting hole is on the front of package (with device marketing side)
5. Yes, you are right, standby VO is 12V as well. we will correct 5Vstb into 12V in schematic figure 4 in report