# Need Help to Lower THD

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Hello Sir!

In my RDR-290 based circuit I need to achieve THD <10%.

What changes I can do to get this value.

Currently in production I got result between 18 to 21% I need to reduce this immidiately. Please guide for this.

Were you able to achieve <10% before production? I looked at RD-290 report but even RD-290 has > 10% THD.

If you can add an external circuit, you may try to add an R-C between the DC bus (C8) and FB pin. The value of the R-C has to be fine-tuned but for a start, use 10nF/630V and 2.7Meg/0.5W. If the resistor value is not optimized, the unit might go into auto-restart or skip cycle. You might want to use the equation below and make sure the resistor is higher than the computed values.

If you can't add components, you can lower the KP further (make it more continuous) by increasing the inductance. This lowers the THD a bit but it might not be enough to achieve <10%.

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Resistor Calculation15.85 KB

The three design considerations to lower the Total Harmonic Distortion:

1. Increasing transformer turns ratio (n = Np/Ns) increases the reflected voltage. This means higher voltage stress on the switching FET and higher cost. In this particular case, we kept the reflected voltage at around 174 V by keeping the turns ratio near 10. FET rating must be higher than sum of Overshoot voltage, (LED maximum voltage + Output Diode voltage drop) * Turns Ratio and peak AC input voltage. It turns out to be nearly 640 V [= 50 V + (20 + 0.5) * 10 + 1.414 * 265]. I used a 700-V rated FET with low drain to source capacitance of ~16pF.
2. Increasing delay time of the converter leads to lowering of THD. I changed the resistor from calculated 5.6k to 6.2k. Delay time depends upon the primary inductance of the transformer and drain to source capacitance of the FET. Delay time comes out to be around 280ns.
3. Adding EMI filter at the input.In this example, common mode choke of 80mH with a capacitor of 68nF, 275V ac was added at the input along with a π filter comprising of 1mH drum inductor and two capacitors of 33nF, 400 V each following the bridge. This helps us realize the corner frequency of the differential filter to be at 2.15 kHz. Icalculated these values in multiple iterations after looking at the conducted EMI curve with the help of Line Impedance Stabilization network and Spectrum Analyzer. Initially, without any line filter, we saw a peak of around 85dBuV at 100 kHz (Fsw of the converter). The spectrum was exceeding the CISPR 15 Class B standard limits all the way till 1MHz after which the spectrum was under the limits. An EMI filter was absolutely required. I increased the common mode choke value in steps, and saw its effect on THD performance (Increasing capacitor above a certain points will have degraded PF performance). Ultimately, it came to around 80mH and 68nF, with a cut off frequency of 2.15 kHz with an attenuation of more than 30dB leading to ~55.78dBuV at 100 kHz.  Resulting spectrum shifted down and it helped the light meet CISPR 15 standard as well (both quasi-peak and average limits). The THD improved to ~9-10% as a result of this change. Leakage inductance associated with the common mode choke helped realize a differential filter.

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