Run away load current

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Hi Jono ! Thanks for your inputs earlier on MUR160. We built the 24V/2.2Amp LED driver with LNK420, the Schematic from PI expert and the Transformer designed on PIxl spread sheet. We got output current of 2.2Amp at 29V from 110V to 280V AC input. PF better than0.95 but the efficiency obtained was between 81% and 85%. Please suggest ways to improve the efficiency to 90% which was the target efficiency under the PIxls.
We have another interesting problem. When we run the Driver at 90 to 100 V AC input, the Load current increases slowly from 2Amp and crosses 2.3Amps at which point the output turns off for a brief period and comes on again. This cycle keeps repeating as long as the AC input remains between 90 and 100V. Please clarify how to address this problem and the possible reasons. Is the Junction temperature of LNK420 responsible?The Heat sink is 2mm Al with a surface area 20% higher than recommended.

Hi Ramakrishnan,
Can you have a loss budget to determine the exact heatsink required. Kindly measure the switching losses and conduction losses to determine at what parameter you are going to focus.
Please check if you have a sufficient thermal grease between the tab of the device and the heatsink.
Please check the power loss on the TRF. Can you further improve the TRF design by increasing wire size and improving the magnetic coupling.
Please check the power loss in your EMI filter, how much percent this loss in the system?
Check if the output diode speed is enough. You might need to increase the current rating of your output diode.
You can shift the blocking diode to anti- parallel connection across the drain and source. Meaning Anode to source and Cathode to drain connection.

I hope this helps in your development.


Hi, Jono, Thanks. We will check out the various ideas for improving the efficiency further. Kindly explain the idea behind removing the Blocking diode and putting it across the LNK Drain/Source. We thought the Anti Parallel diode is integral to LNK 420.
We also need our Drivers passing the 4KV differential and Common mode surge tests. Please confirm whether the PI expert schematics meet this requirement ? If not,are they designed to meet the min 2.5KV surge tests both Differential and Common mode? Please clarify since the PI designs do not provide this data. Please also suggest ways and means to achieve the 4KV Surge Pass in an otherwise 2.5KV pass PI design! Regards

Hi Ramakrishnan,
Yes there is a developed diode in the junction of the Mosfet but not enough to withstand the repetitive reverse current that is why a series diode or a low voltage drop anti-parallel diode is recommended.

To pass the 4kV surge you need to increase the size of the MOV in able to withstand the spike energy from the line. Please make sure the clamping voltage as per data sheet is below the rating of the bridge rectifier. Example, a 275VAC MOV will actually clamp at 670V. Do not rely on the markings, you should take a look at the actual clamping voltage. And for the common mode, make sure that the layout key techniques were followed for immunity such as proper Kelvin connection and grounding techniques. Make sure you have enough clearance to avoid arching between your heatsink and chassis.

Please add some spark gap between your primary and secondary winding so as with the primary circuit to the earth. This will further improve your immunity in industrial surge level.

As for the EMI, you might need to optimize it depending on your the final system. The PI-expert EMI block is based form the units we have built and your final system will be the final testing set-up. It might be overdesigned or you might need to tweak it if required.

Great! you are almost there....


Hi, Jono, Thanks for your guidance so far. Please clarify the the important characteristics of the Anti parallel diode, Can we just use MUR160 or UF5402 and short out the Blocking diode? Please confirm whether a soft diode or a snappy diode is best suited. Also the Max Trr of the diode. Look forward to your comments.

Use MUR160 because you need to connect it in parallel, UF5402 is only 200V rated. Please parallel it directly across the drain and source pin because layout is critical in this approach.


Dear Jono, Thanks. I tried MUR 160 connected anti parallel. Got a Marginal improvement in efficiency of 0.8%. We will use this technique in the future. These diodes are rated for only 600Volts! Would it be right to use these across a device with 725 Volts rating,esp when In many of the designs with wide input range, the peak voltage on the Drain reaches 650Volts? Please clarify.
We see efficiencies hover around the 84% mark on drivers with more than 2A load where as in the range 1.2 Amps to 1.6Amps the efficiency is between 87 to 90%. Is this ok? Apart from the anti parallel diode is there any other tip to improve the efficiency to say 92%?
There is also observation that the clamp voltage(across Drain RCD clamp) hovers around 120V. The application note mandates the clamp voltage should be more than twice the VOR . With a VOR of 80 Volts this clamp voltage should be around 160V. We don't get beyond 125Volts. Even after adjust the clamp resistor for optimum ripple. The TVS diode 6KE180 across the clamp is probably helping during start up and output short circuit only. Please clarify on this. Will the the primitive Zener clamp improve the efficiency. The Clamp cap we used is 4700Pf/1KV poly propylene with 15KE/2W across. These vales were calculated from basics and practically check out. The PI expert recommended 22KPF cap with 6K8/2W resistor and the clamp voltage was less at 105V. With the former clamp values the switch off swing is limited to about 60V over the quiescent level and the peak to peak Drain swing is less than 650V at 300V AC.please clarify what should be the actual clamp voltage and also the method of measurement.and last but not the least 'Are we doing fine?' Regards

Hi Ramakrishnan,
You are right, you need to use anti-parallel diode that is rated above the actual measured Vds in order to avoid voltage stress.

One way to further improve the efficiency is by increasing the output voltage. By the same power output, increasing the output voltage will reduce the conduction losses in the output diode, transformer winding and PCB traces.

If you can not increase the output voltage, please check if there is a room for increasing the wire gauge of transformer. Verify also the EMI filter. See if you can further reduce thee resistance of the filter.

By the way, efficiency measurement for a single stage PF converter is a little bit tricky. You can not just measure the Vout and Iout through multimeter. You need to use power meter to measure the Pout to consider the RMS. The multimeter will just measure the average Vout and average Iout, you need the instantaneous product of I(t) and V(t) then average to calculate the exact Pout. You can not use Vout (RMS) times Iout (RMS) because of the phase difference of I and V.

If you do not have extra power meter in the output, you can use the oscilloscope. Use the Math and multiply the Vout and Iout then get the mean. Make sure to use the gating of the scope to average correct Pout.

In case you want a quick Pout measurement using the multimeter you can also try increasing the output capacitor in such the ripple is very very small. This way Idc X Vdc applies.

As for the ringing on the Vds, you can try the regular the ZenerRCD clamp. This might help you in improving the efficiency.


Dear Jono! Thanks for some wonderful inputs on improving efficiency and correct measurement methods. You have not however shed any light on the Snubber voltage actually realised in various PI designs. With a chosen VOR of 90Volts, the snubber voltage rarely exceeds125Volts. The PI however recommends 180Volt TVS diode, which does not play any role in the Snubber operation. Please explain the logic behind this. Also confirm whether a Snubber voltage of around 120V is good enough!
You have also advised how to get a wide output range 24V to 48V by selecting a IFB of 200Micro amps at 24V. This is a novel strategy. Wonder whether satisfactory output current regulation will be achieved over wide input Mains operation from 85V to 300V? You have however cautioned to check Duty cycle while selecting this strategy. Please elaborate how to go about this. The choice of Lp and Turns ratio is also critical for optimum efficiency. Can we as such achieve optimum results. Please clarify.

TVS will clamp during abnormal condition such as output short and start-up, line surge condition. This is to guarantee that it clamps below the rating of the Vds and output diode. It is not recommended to clamp the ringing trhough TVS during normal operation because it will sacrifice the efficiency, it will be a contributor for additional heat in the system and might reduce the reability of the part. In addition, continues clamping will create additional noise in conducted and radiated EMI. If at normal operation withing the voltage operating range, the ringing is not exceeding 125 V then yes, you can use this rating.

It would be very hard to achieve wide input voltage range with wide output voltage range without adding extra components. You need to consider the maximum and minimum duty cycle at extreme condition of your spec. Like duty cycle minimum for Vin max and Vout minimum and duty maximum at at Vin minimum and Vout max. Wherein this parameters are related to the turns ratio of the transformer.